Core idea
Data launches from one flip-flop, travels through combinational logic, and is captured by another. Setup uses maximum delay; hold uses minimum delay.
Launch FF+Clock-to-Q+Data path→Capture FF
The same register path is evaluated with max delays for setup and min delays for hold.
Slack equations
Setup arrival = Tcq(max) + Tdata(max)
Setup required = Tperiod + Tskew - Tsetup
Setup slack = required - arrival
Hold arrival = Tcq(min) + Tdata(min)
Hold required = Tskew + Thold
Hold slack = arrival - required
Setup required = Tperiod + Tskew - Tsetup
Setup slack = required - arrival
Hold arrival = Tcq(min) + Tdata(min)
Hold required = Tskew + Thold
Hold slack = arrival - required
These equations use the convention that positive skew means the capture clock arrives later. A non-negative slack passes; a negative slack is a violation.
Worked example
Given
Period = 10 ns, skew = 0.1 ns, setup = 0.7 ns, hold = 0.2 ns, Tcq(max/min) = 0.8/0.25 ns, path(max/min) = 5.6/0.35 ns.
Setup: required 9.4 ns, arrival 6.4 ns, slack = +3.0 ns.
Hold: arrival 0.60 ns, required 0.30 ns, slack = +0.30 ns. Both checks pass.
Common mistakes
- Using maximum path delay for the hold check.
- Assuming a slower clock fixes hold; hold is checked around the same edge.
- Ignoring clock skew, uncertainty, and library setup/hold values.
- Reading positive slack as a violation. Negative slack indicates failure.